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SX1223
CPOUT, pin 20
C1
C2
R2
C3
VARIN, pin 21
CPOUT, pin 20
C1
C2
VARIN, pin 21
47nF
C3
R1
a)
R1
b)
Figure 5 :
Loop filter for a) closed loop modulation and b) open loop modulation
4.1.6 Lock Detect
A lock detector can be enabled by setting LD_en=1. When enabled pin LD is set high, indicating that the PLL is in
lock. The lock detect signal can also be used to control the PA; if LD is low the PA is turned off and vice versa. To
enable this function, the PA_LDc_en must be set to ‘1’ (see section 4.3).
Care must be taken when monitoring the LD during data transmission using the closed loop modulation. The LD
may show that the PLL is not locked, especially when the loop filter bandwidth is too high relative to the bit rate.
4.2
MODULATOR
4.2.1 Introduction
The modulator has a high degree of flexibility, and there are thus several values that need programming. First, the
settings concerning the data bit rate must be determined, then these values will be used in the calculation of the
frequency deviation. Finally the user must check that the modulator won’t saturate with the values chosen.
4.2.2 Data Interface
The "data interface" can be programmed to synchronous or asynchronous mode (see Table 4).
Sync_en
0
1
State
DataClk pin off
DataClk pin on.
Comments
Transparent transmission of data
Bit-clock is generated by transmitter
Table 4 : Synchronizer mode
In asynchronous mode only the DATAIN pin is used for transmitting the data to the SX1223.
In synchronous mode the SX1223 is defined as "Master" and provides a data clock on pin DCLK that allows the
user to utilize low cost micro controller reference frequency. The data interface is defined in such a way that all user
actions should take place on falling edges of DCLK as illustrated in Figure 6. The data are sampled by the SX1223
on the rising edges of DCLK.
DATAIN
DCLK
Figure 6:
Time diagram of the data interface in synchronous mode
Before entering into transmit mode (mw1 or mw2), it is important to set DATAIN to high impedance. The data is
provided directly to the modulation circuit and violation of this may cause abnormal behavior.
? Semtech 2007
11
www.semtech.com
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